Codes Explorer: verilog codes

Showing posts with label verilog codes. Show all posts

Sequential Multiplier Verilog Code

by Abhay KagalkarFebruary 10, 2017

Sequential Multiplier Verilog Code Verilog Code module SequentialMulti(input C,input [3:0]M,input [3:0]Q,output reg [8:0]Z ); integer i; ...Read More

by Abhay KagalkarFebruary 08, 2017

T FlipFlop Verilog Code Verilog Code module TFlipFlop(T,Clk,Q,Qbar ); input T,Clk; output Q,Qbar; reg...Read More

by Abhay KagalkarFebruary 07, 2017

4 bit Booth Multiplier Verilog Code Verilog Code module BoothMulti(X, Y, Z ); input signed [3:0] X, Y; output sig...Read More

by Abhay KagalkarFebruary 07, 2017

4 bit UpDown Counter Verilog Code module BCDupdown(Clk, reset, UpOrDown, Count ); // module Decl...Read More

by Abhay KagalkarFebruary 07, 2017

SR FlipFlop Using Case Statement Verilog Code Verilog Code module SR_FlipFlop( input J, input K, input clk, ou...Read More